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ESPurr v2 hardware plan

Build fixed fabric/fur LED ears with headband control, stereo microphones and experimental sensing. No motors or dense LED matrix.

This file tracks direction and remaining work. Detailed selections, pin maps and interface requirements live in the design reference; working rules and repository ownership live in AGENTS.md.

1. Current priority and status

Get the LED-ear prototypes with fitted AW sensing built and physically qualified.

Area State
Left ear Manually maintained 69-LED source; preserve current manual work
Right ear / panel / quote Generation implemented; supplier and physical release gates remain open
Headband Bridge/model revision adds denser edge-intersecting mousebites without rerouting; Supply-pour audit clears SDA/CC via bottlenecks; zero DRC/parity findings and opens, schematic unchanged since clean ERC; Manual-routing review corrects local clearance, supply and USB-reference issues; WROOM quote/panel exports refreshed with the 8.5mm slot; supplier preview and physical acceptance remain pending
Firmware Reference-only here; 31 October source recheck finds v2 implementation; mounted integration/qualification remains open
Proximity sensing AW96105DNR / C5125883 selected for the first build; front-side block and three electrode feeds routed; physical qualification pending

Current build commands, checkpoint evidence and outstanding findings are in the pair/panel guide, not a production-readiness claim. The 2026-10-27 INA232 + external-shunt replacement and 1.25A per-ear path target are applied to the schematic/PCB with audited shared libraries and revised routes. That replacement checkpoint's software checks pass; they do not qualify the higher current target on the complete mounted assembly.

2. Settled ear decisions

  • 69 WS2812C-2020-V6 LEDs, 48/21 chains, 27 LED capacitors and rear FH34SRJ-10S-0.5SH J1. Hold LED/J1 poses and the exterior contour. The B-only sensor pocket removes A, rounds the island corner and feeds the inner LEDs through B. Derive every right ear/panel from the left master.
  • The bottom baseline now follows a fitted quadratic with smooth corner joins; side edges, rounded corners and bounds are held.
  • The current master selects AW96105DNR / C5125883, replacing AW93205 for the first build with the same DNR pinout and land pattern. It retains XC6206 and front-side bypass caps; their connections and three electrode feeds are routed in the AW refinement. The lower-moat refinement trims the outer lip, smooths the island baseline and lowers the support block, with mirrored package fit/local escape checked separately from a complete right-ear rebuild. The I2C transition refinement lowers C1/C5 and places the vias below the AW for shorter connector runs. A complete right-ear routing review now rebuilds the real packages, raises right C1 and gives C5 its own placement. Frozen older order inputs remain separate from the fresh AW manufacturing outputs.
  • The baseline/AW moat refinement retains the thin rim, lifts left C1 to match the right review, and removes C9 and its dedicated stitch. just aw-ear-fab <round-tracks-plugin> <fresh-output> is the AW-specific rounded L/R and rail-free manufacturing workflow; the older LED-only commands retain their historical population and moat contracts.
  • The approved moat refinement restores the lower island LED border, preserves the right slot's existing sweep and rounds both ends beside B. The exterior, poses and routing are held; the left outer rim is at least 6.846mm and B remains about 4.505mm wide. New AW manufacturing outputs retain blank moat infill on 0.8mm laser tabs through shipping; the master and presentation renders describe the finished B-only ears after removal. The 25 October frozen files are a prior pre-order candidate; no ear order has been submitted.
  • Three independent rear experimental electrodes are fully covered, without manual wire lands or coverlay openings. The ear outline and active LED layout are held. Order inputs use the rail-free L/R pair at 109mm maximum width; JLC supplies its own panelisation/carrier.
  • Request nominal 0.12mm finished flex / 0.5oz copper per side, white coverlay, black silk and ENIG; use 18µm nominal copper for electrical estimates. The saved ear and empty parent CAD stacks use this nominal model too; the ear-stack contract records the layer split and potentially thicker finished white coverlay.
  • Rear Tesa 8854 artwork covers the island perimeter and outer rim, with rounded inner corners and connector clearance. Export filled positive psb_tesa8854.gbr; adhesive thickness is additional to flex.
  • Direct 3.3V data, no level shifter or LED power gate. Target 1.25A continuous per ear path, allowing margin above the roughly 1.04A full-RGB-plus-sensing load. This supersedes the 750mA design target; copper, connectors, cables and thermal/drop qualification must be rechecked. Operating limits still follow the complete USB/per-ear budget.
  • Start black, establish safe budgets, then enable normal animation; recovery+test defaults off. Enforce the 70% blue ceiling through every output path.

Use the ear design detail, connector guide and fit record for implementation.

3. Settled headband direction

  • USB-entry C116 is removed (2026-10-31) to reduce VBUS capacitance/inrush. Retain the buck and LDO local capacitors; this is not an inrush-compliance claim.

  • Rigid left/right mains manufactured as one electrically connected assembly/test PCB, then separated. Use nominal 1.6mm / four layers, JLC04161H-7628 (standard 7628, without an A suffix), with 1oz outer / 0.5oz inner copper and ENIG, green mask and white silk on both faces. The silkscreen pass adds connector/bridge labels; the 2 November pass moves U references to the rear, adds front chip labels/branding and a 5mm rear QR placeholder. Production filenames identify the board and stable design-input hash. Six layers are a routing fallback. The rigid rule profile replaces the copied flex settings. The first outline and placement uses a 35 × 45mm broad-foot left main and now 16 × 19mm right main; the manually revised placement is retained and the web has mousebite tabs with eight small pre-bridged solder jumpers for individual cut/re-solder tests. The 2026-10-31 WROOM manual routing checkpoint preserves the locked poses, right/bridge routing and complete buck block. Rear 5V is continuous; small front landings and a simple L3 3.3V region replace the old trunk zones. All eight temporary bridge paths remain. DRC/ERC/parity are clear. USB resistors sit beside the socket; the long pair is on B.Cu over dedicated L3 ground. Separation strain, temporary power-path rating, supplier acceptance and mounting remain open. WROOM quote files and the revised KiKit carrier were regenerated on 2026-10-31 after supply-via cleanup, with exact U101 sourcing C2913202. Source ERC/DRC, panel DRC, transformation and copper-CAM checks pass. Existing MINI quote/panel outputs remain historical snapshots. just band-quote <fresh-build-output> exports the saved joined board's Gerbers/drills, BOM and CPL; quote settings and remaining sourcing/preview gates apply. This is not an order or production release. The 2026-10-29 quote portal requires Standard PCBA for the BX and S3 module; just band-panel <fresh-build-output> generates a two-assembly 75 × 91.5mm nested mousebite carrier using KiKit, with panel BOM/CPL and independent checks. See the panel guide; supplier preview/acceptance remain open.

  • RESET and both application buttons use XUNPU TS-1088-AR02016 / C720477, with the audited footprint in the shared library. USB VBUS feeds 5V_L directly; F101 is removed and a dedicated inrush limiter is deferred.
  • ESP32-S3-WROOM-1-N16R8 (16MB flash / 8MB octal PSRAM), HUSB320 CC/current detection, SY8089A1AAC / C479074 with a 100kΩ/22kΩ divider (3.327V nominal) and 22pF feed-forward cap, and one INA232AIDDFR / C5447660 plus Milliohm 10mΩ shunt / C2912774 per ear feed. This replaces the INA701-primary/INA745A-fallback plan and is now fitted at U106/U203 with R132/R202; range, calibration and routing details specify ADCRANGE=1, nominal ±2.048A measurement range and 62.5µA/count. LTR-F216A ALS on each main.
  • Orange GT-USB-7010AO / C963413 USB-C receptacle, with black GT-USB-7010ASV as the alternative. Prefer JLC Basic jellybeans while retaining the specified electrical requirements; current selections and exceptions are in the design reference.
  • LSM6DSV16BX on the left rigid main, with full contact audio alongside stereo PDM. Ordinary microphones use separate reversible ten-way flexes with main-board SEL pulls; use MD-DRA371-H10 / C50275760 on both sides, with no separate BX flex/socket.
  • Cross-band connection: Molex Pico-EZmate power jumper plus six signals and four grounds over a ten-way FFC. The selected cable reverses FFC contacts 1↔10 and power contacts 1↔2; the right main now has its installed orientation. Right logic uses XC6206P332MR-G / C5446, upstream of its ear-current monitor. Poll the monitors; their ALERT pins are unused.
  • I2C0: BX, left ALS and HUSB320. I2C1: both INA232s and right ALS. Reserve the corresponding bus at each ear for AW96105 sensing; the ear block is placed with its three feeds routed pending electrode tests. The ear's current 5/6/7 map is inner-data/SCL/SDA; Ear socket poses are manually revised and fixed. The current cable plan is 1→1 at both ears, with one 90° fold; confirm installed conductor continuity. The rail/LED order is retained and band contacts 6/7 now carry SCL/SDA. Cross-band FFC numbering still reverses 1↔10. The per-device I2C address table, placement-informed GPIO and connector maps are in the design reference; verify saved connectivity, cable behaviour and simultaneous peripheral operation.

The WROOM migration supersedes the earlier MINI module and its routing acceptance. The current map retains left outer/inner LEDs on GPIO5/4, right outer/inner on GPIO6/7, I2C0 SDA/SCL on GPIO16/15, I2C1 SDA/SCL on GPIO10/11 and PDM CLK/DATA on GPIO9/8. CC_INT_N moves to GPIO12; BX BCLK/WCLK move to GPIO13/14, with DATA still on GPIO21. GPIO35–37 (module pads 28–30) and GPIO47/48 are unused. Use WROOM-1-only ground/paste geometry; the overlapping WROOM-2 ground provision is removed. A future WROOM-2 substitution requires a new footprint review. BOOT and UART test pads are on the rear; no programming header is fitted. TP105/TP106 are removed. Firmware integration remains separately authorised work. The current manual-routing checkpoint has zero DRC violations/opens/parity findings and clean ERC. The USB reference-plane checks pass; visual acceptance and WROOM manufacturing regeneration remain pending.

The following checkpoints describe the earlier passes, now superseded by that reset. Preserve the fixed sockets, S3, BX and buttons; retain the current buck area unless a concrete route requires a small whole-block move. Signed recovery checkpoint 288930d is retained on codex/headband-manual-20261026-2156; 6f5ad7c checkpoints the complete manual working tree immediately before this pass. The initial routed checkpoint's power routing was rejected in the 2026-10-27 visual review. The power-path revision replaces the serpentine feeds, uses local power copper and simplifies adjacent fanout without invoking KRT. All fourteen locked poses and every pad net are preserved; independent refilled DRC reports zero errors, opens or schematic mismatches, with seven existing silk warnings. The subsequent INA232/signal cleanup is applied and checked under the same rules. The approved compact placement rework moves the right LDO between its fixed FFCs, shortens that main by another 3mm, arranges the INAs like TI's layout example and relocates the service probes. Local routing and power regions are rebuilt; fresh saved DRC/parity is clear. The original handover retains the rejected checkpoint and recovery evidence; b43538a is the pre-routing state. After the crash, KiCad was closed with no newer band autosave and the saved board matched the checkpoint. The revision used native KiCad on guarded copies and saved readback; there was no live editor session to verify.

Mechanical envelopes, cable maps, audio/resource allocation and power policy are in the headband design detail.

4. Next gates

  • Ear release: supplier-confirmed stack, connector support/strain relief, adhesive and panel/laser/moat handling; actual cable continuity, frame/fabric fit, diffusion, loaded current/drop/thermal checks against the new 1.25A per-ear target, waveforms and transients. Historical 750mA checks do not establish the higher capacity. Use the pipeline gates and flex rules.
  • Headband: INA232/shunt replacement and 0x40/0x41 addresses are applied. Physically qualify the complete ear feeds for 1.25A, including the shared upstream supply path and joined-test links. Qualify assembly and power/audio circuits. Current firmware source allocates one S3 RMT memory block per v2 chain; qualify simultaneous four-chain/PDM/BX operation under radio and flash load. Before powering the assembly, verify folded-cable continuity, mounting, joined-test links and separation; physically check USB geometry on the selected rigid stack. The band sits under the frontmost edge, clear of the rear antenna overhang. See the design entry for the starting scope.
  • Firmware handoff: reconcile the implemented v2 mapping, PDM/BX capture and USB/current/fault policy with the finished hardware and qualified operating limits. The dated source recheck establishes source presence, not mounted acceptance. Firmware changes remain separately authorised work.

ERC/DRC, exported CAM, supplier acceptance and physical operation are separate checks. None of the open physical gates is closed by a successful build.

5. Deferred work

Shared project website: eventually use a separate site repository for the /espurr/ landing page, with firmware docs under /espurr/fw/ and hardware docs under /espurr/hw/. Keep independent version selectors and release histories for firmware and hardware. Leave the current sites, URLs and deployment workflows as-is until that migration is explicitly taken up.

v3 headband beeper: reserve space for a FUET-3020 / C2972843 magnetic sounder with an AO3400A / C20917 (SOT-23) low-side logic-level N-channel FET driver, gate pulldown and RB521S-30 / C8523 (SOD-523) flyback diode. Defer this addition to v3 rather than reworking the current layout. Test loose samples on a protoboard to establish useful tones/loudness before finalising the footprint and drive circuit.

The AW96105 ear block and electrode feeds are routed. Series resistors, shielding, startup/firmware and through-fur operation remain open; the 0.127mm feeds depart from the vendor guide's 0.1mm recommendation and need physical qualification. The authorised B-only pocket/LED-feed change is applied; the old IQS231B provision is superseded in the current ear master.

The standalone AW93x05 breakout supports AW93105DNR, AW93205DNR and AW93305DNR for the three manual electrode pads. Its schematic and PCB are designed; supplier acceptance, device-specific firmware and bench qualification remain open. The shared ESPurr libraries include all three symbols and their common DNR footprint.

The separate LSM6DSV16BX hand-assembly breakout has a checked schematic and routed 28 × 25.4mm two-layer PCB, with 0402 passives and all components top-side. I²C/SPI, interrupts, TDM and Qvar pins are accessible. ERC/DRC/parity and exported CAM checks pass; supplier mask-dam acceptance and hand-assembly/bench tests remain open. Local artwork/paste derivatives preserve the headband's audited BX copper pattern without changing that board.

Firmware integration, headband layout review/physical qualification and mounted microphone-flex qualification remain separate tasks. The common 40mm detachable mic flex is now designed with a 3mm neck, 0.11mm standard yellow PI and local 0.225mm rear PI support. Source ERC/DRC/parity pass; supplier construction, assembly and mounted audio/retention remain open. just mic-flex <fresh-output> exports on copies. The 2026-10-30 routing pass holds placement and uses four straight front-layer neck runs over continuous rear ground. The tongue now has a full-width 2.5mm coverlay opening and 3.5mm minimum PI support for FH19SC compatibility, retaining the agreed 0.2mm copper setback; connector pin numbering/fit still need checking if substituting FH19SC. The bare 16-up mic panel uses a 74 × 96mm retained laser-tab carrier for hand assembly; reproduce with just mic-flex-panel <fresh-output>. This does not adopt Standard-PCBA requirements or close supplier or mounted-audio gates.

6. Generation and tooling

Use root just recipes over the hardware CLI; just --list is the command catalogue. Generate only on build/ copies, preserve source hashes on success/failure, and never use generated right ears/panels as inputs. Tooling rules are in AGENTS.md, setup in README.md, and KRT constraints in the routing guide. The hardware documentation site uses KiBot exports and MkDocs for the six source boards. Routine CI uses 2D previews; v* tags and explicit manual requests add native raytraced galleries. Custom ear generation and manufacturing qualification remain separate. Final band, fab, all and aggregate breakouts stages remain planned.

Further reading: docs index, ear history, frozen orders and artwork provenance. Keep dated checkpoints and detailed recipes out of this file.