Headband reset: pre-routing review¶
Status: approved and implemented on 2026-10-27. The tables below retain the
reviewed proposal; final routing, small placement adjustments and validation are
recorded in the implementation record.
Snapshot bc993cc preserves the
manual board before this reset. C115/C126/C206 and their redundant schematic
branches are removed. The original review candidate contained no new routing;
the subsequently approved source implementation supersedes that trial.
Local review figures and native trial boards are in
build/headband-reset-20261027/. review.html collects the figures and tables;
reset-plan.json contains exact per-item keep/remove UUIDs and placement deltas.
Source and live snapshots are retained there separately.
What stays and what goes¶
| Group | Proposal |
|---|---|
| Locked footprints | All 14 poses, sides and locks unchanged: module, BX, switches and connectors |
| Mechanical geometry | Keep outline, slot, mousebites, antenna reservation and footprint-owned cutouts |
| Manual buck | Keep U103, L101, C111/C112/C113, R120/R121/C129 and local copper exactly where they are for this trial |
| USB | Keep all four USB nets and R101/R102 unchanged in this trial; Andi permits coherent movement/resistor relocation if later justified |
| Temporary bridge | Keep the 20 F.Cu track segments within y=91.5–100.5mm, plus jumper footprints; rebuild the approaches outside that span |
| Ground stitching | Retain existing useful via positions, including the module-end row; remove redundant track spokes outside the buck/web |
| Remaining signals | Remove existing I2C, LED, PDM, BX audio/IRQ, CC, controls, service and reset routing; rebuild around the reviewed placement |
| Remaining supply tracks | Remove long supply traces and overlapping track constructions; rebuild as deliberate pours/local connections |
The concrete candidate retains 42 buck copper items, 32 USB copper items, 20 bridge track segments and 55 other ground vias. It removes 726 tracks and 112 vias. Two ground vias are included in removal: (103.85,115.65)mm was C126's now-obsolete return, and (107.1,118.6)mm belongs to the superseded INA bypass arrangement; both conflict with the new monitor placement. The module ground-via row is retained. Counts classify items, not complete connected nets.
The buck local envelope is x=105–114.5mm, y=121.5–131mm for power/ground copper, plus all LX and feedback items. Its LX pour remains intact. The long incoming/outgoing distribution outside that block is explicitly eligible for replacement. This boundary is visible in the teal/red teardown figure.
Placement proposal¶
- Left monitor: horizontal R132 at (106.50,115.75)mm, 180°, feeding right to left; U106 at (105.75,119.00)mm, −90°, and C125 at (103.50,116.00)mm. The measured feed can rise directly towards ear contacts 8–10. The INA rotates with the shunt so its sense inputs face the resistor.
- Upper signal bank: R110/R109, R117/R118, R115/R116 and R113/R114 form a regular row above the module at y=117mm, x=120.5 through 129.25mm in 1.25mm increments. Pull-ups and series parts retain their electrical roles; the proposed GPIO ordering makes this bank face the upper connector routes.
- Boot/module support: regroup JP1/R104 and align C101/C102 and EN RC parts. Fixed module pads remain exact, rather than snapping their geometry.
- BX: preserve U104; put R131 at (101.50,138.00)mm, −90°, beside its actual destination; align C121 to the supply pin's y=141.25mm.
- Service: TP107/108 are proposed at (105.0,134.5)/(107.5,134.5)mm below the buck, with power/ground probes at (101.5,129.5)/(101.5,131.75)mm. These remain short-tap candidates; they must not dictate circuitous main routes.
- Right: retain the reviewed block arrangement and manual R202/R201 intent, with small 0.25mm-grid alignment changes. U201 becomes (109.5,81.75)mm, R202 (101.75,75.75)mm and R201 (110,78)mm. No connector moves.
All proposed moved origins are on the 0.25mm grid. The hand-routed buck and USB resistor origins are exceptions because their geometry is retained intact. The native trial has no courtyard overlaps, copper clearance, hole clearance, keepout or copper-to-edge errors. Opens, dangling retained stubs and incomplete pour connections are expected at this stage; this is not a completed DRC pass.
Approved GPIO allocation — subsequently applied¶
The eight upper module pads, read from left to right in the actual placement, become SCL, SDA, PDM clock, PDM data, right outer, right inner, left outer, left inner. The first six follow the cross-band connector's signal order.
| Function | Current GPIO | Proposed GPIO | Module pad | Absolute pad X/Y, mm |
|---|---|---|---|---|
| I2C1 SCL | 9 | 11 | 15 | 123.80 / 119.70 |
| I2C1 SDA | 8 | 10 | 14 | 124.65 / 119.70 |
| PDM CLK | 10 | 9 | 13 | 125.50 / 119.70 |
| PDM DATA | 11 | 8 | 12 | 126.35 / 119.70 |
| Right outer LED | 12 | 7 | 11 | 127.20 / 119.70 |
| Right inner LED | 13 | 6 | 10 | 128.05 / 119.70 |
| Left outer LED | 14 | 5 | 9 | 128.90 / 119.70 |
| Left inner LED | 15 | 4 | 8 | 129.75 / 119.70 |
Keep I2C0 SDA/SCL on 16/17, CC interrupt on 18, USB on 19/20, BX data/BCLK/ WCLK on 21/47/48, BX interrupts on 38/39, buttons on 41/42, UART on 43/44, and BOOT/EN unchanged. The BX copper is still redrawn. GPIO12–15 become spare; GPIO1/2/40 remain spare. Strap and module-memory reservations are unchanged.
GPIO4–11 are ordinary matrix-capable pins according to the
ESP-IDF v6.1 S3 GPIO documentation.
The RMT driver
accepts a configured output GPIO. The I2S0 PDM / I2S1 TDM peripheral assignment
does not change. This is a static hardware proposal, not firmware integration
or a simultaneous audio/RMT test. Firmware HEAD was read-only at
d20b333540c1396773aa257edef9997fe4377c05; no firmware files or Git state were modified.
Big pours and supply corridors¶
| Region | Proposed treatment |
|---|---|
| L2 GND_L/GND_R | Keep continuous reference planes, separation and outline clipping |
| F.Cu GND | Keep the regions; refill around the rebuilt routing and remove redundant pad spokes where fill supplies the connection |
| Buck LX | Preserve exact geometry |
| Left L3 3V3 | Simplify to (101,114)–(134.5,132.25)mm rectangle clipped by the board; remove the lower/rear extension and small notch |
| Left L3 GND | Fill the area freed below y=132.25mm, including the BX/USB routing corridor; no new signal routes cut into L2 |
| Left measured EAR_5V | Replace the bent shape with x=104.85–106.35mm, y=112.4–116.3mm, joining the horizontal shunt output to the ear power pads |
| Right L3 5V/3V3 | Keep the existing large-region boundaries for this review; connection vias/fills will be rebuilt around the placement |
| Right measured EAR_5V | Keep the current simple region; refilling must connect the moved shunt's output without including its input |
| Left main 5V | Replace the removed track stacks with broad outer-layer feeds; proposed corridors shown separately below |
The left 5V corridor diagram is space allocation, not finished copper: F.Cu upper spine x=109.5–111.75mm, y=104.5–123.25mm; B.Cu link beside the buck x=112–114.75mm, y=123–133.5mm; F.Cu input region x=110.5–115mm, y=133–140mm. Use the retained buck input interface and proper parallel-via transitions. Final boundaries must clear pads, preserve the USB pair and meet the 1.25A per-ear/shared-input path requirements. Low-current supplies below the simplified 3V3 region use local front connections rather than a power-plane finger through the ground-reference corridor.
Checks and review gate¶
Completed source work is limited to the three capacitor removals and wire-branch cleanup. Fresh standalone ERC has zero findings; the new netlist removes exactly those references and preserves every other pin/net assignment. Native trial readback checks the held footprint poses and retained buck/USB copper.
Andi approved the removal boundary, placement, GPIO order and pour/corridor changes, including further removal of surplus joint vias. That fulfilled the requested pre-routing review gate. The original trial remains recovery/review evidence and carries the old pad net assignments; use the current source and implementation record for the applied design.